Course code TPT39
Course title Accelerator Design With OpenCL
Institution TELECOM ParisTech
Course address 46, Rue Barrault
City 75013 Paris
Minimum year of study 4th year
Minimum level of English Good
Minimum level of French None
Key words Heterogeneous Systems, OpenCL, FPGA, GPU, 
Language English
Professor responsible Sumanta Chaudhuri
Telephone 01 45 81 77 24
Fax
Email Sumanta.chaudhuri@telecom-paristech.fr
Participating professors Sumanta Chaudhuri
Number of places Minimum: 8, Maximum: 16, Reserved for local students:
Objectives

The Objective of this ATHENS one week course is to introduce the students to the concepts of programming with OpenCL. Recently there is a trend in Computer Architecture towards heterogeneous systems (HSA) where accelerators like FPGAs, GPUs are integrated on the same die as Chip Multi-Processors. Compute intensive tasks are then offloaded to these accelerators. OpenCL (Open Computing Language) is an industry standard language for parallel programming which is adopted by industry leaders such as Intel, Xilinx, ARM for programming accelerators (i.e Intel FPGAs, ARM Mali GPUs). After following this course a student should be able to :

  1. Write basic OpenCL programs (both host program and kernel) for FPGAs.
  2. Write basic OpenCL programs for programming GPUs.
  3. Be familiar with notions of optimization for performance
Programme to be followed

Day 1 : Introduction to OpenCL API, and Host Program.

Day 2.  Practical work with ARM MALI OpenCL SDK.

Day 3:  Hands On experience:  Programming GPUs with ODROID XU4 Boards.

Day 4:  Practical work with Intel FPGA OpenCL SDK.

Day 5: Hands On Experience: Programming FPGAs with Cyclone V DE1SoC Boards. 

Prerequisites Computer Architecture, VLSI, C/C++
Course exam

The students will be marked based on

  1. Practical Work
  2. Quiz at the end of the course.
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